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A new ASIC implementation of an advanced encryption standard (AES) crypto-hardware accelerator复制

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DOI: 10.1016/j.mejo.2021.105255复制

文献链接: https://linkinghub.elsevier.com/retrieve/pii/S0026269221002433复制

其他信息:

出版社: Elsevier BV
作者: Nabihah Ahmad; S.M.Rezaul Hasan

上一篇：Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography

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